The PSP of communications chip

If you are a developer who is particular about the underlying chip for your application, your demands will by and large boil down to Processing power the chip has, the Space it occupies, and the Power it consumes.

You need the processing power and speed so that you are able to add on multiple applications which can perform various functions. But adding more applications result in two things. It demands more power consumption and since the base band will be capable of giving output in various forms and for many applications, there will be more and more peripherals added to it. So demanding more processing power effectively results in increase of power consumption and the size.Striking a balance between high processing power, the size and energy consumption is perhaps the biggest challenge facing communications chip companies. More or less all this is leading to integration: Integration at programming level, at manufacturing level and even at the design level. Many are even talking about integration of application chip and baseband chip. But integration may not be feasible beyond a certain level.

Moreover the integration paradigm will push down the aggregate cost of chips within an overall network solution creating a high price margin scenario for the solution vendors. Sounds like chip vendors will do all the hard work and box vendors will benefit more.